In this section, you can access to the latest technical information related to the FUTURE project topic.

DIE STACK WITH REDUCED WARPAGE

A microelectronic device can include a polymer, a semiconductor, and a matching layer. The polymer can include a first coefficient of thermal expansion. The semiconductor can be coupled to the polymer layer. The matching layer can be adjacent the semiconductor, and the matching layer can include a second coefficient of thermal expansion that is about the same as the first coefficient of thermal expansion.


» Number: WO2018161347A1 (A1)

» Publication Date: 13/09/2018

» Applicant: INTEL CORP?[US]

» Inventor: SHE YONG?[CN]; LIU BIN?[CN] (2)

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